1. Field of the Invention
This invention relates to integrated circuits, and in particular to a method and circuit for generating a true random, yet controlled, voltage signal which may be used in clock circuits and chopper-stabilized operational amplifiers.
2. Description of Related Art
Attributes of the present invention may be appreciated by considering the example of a chopper-stabilized operational amplifier, and conventional approaches to improving the performance of such amplifiers.
Operational amplifiers or "op amps" typically have two input terminals: a noninverting terminal (denoted "+") and an inverting terminal (denoted "-"). When both input terminals are grounded, an ideal operational amplifier develops a zero output voltage. Under the same conditions, an actual amplifier will have a finite output because of inevitable small imbalances in the components. The offset voltage of the amplifier equals the DC input voltage required to compensate for such imbalances. Unfortunately, such offset voltages "drift" with changes in temperature and time. This is one of the important sources of error in operational amplifier circuits, because it is dynamic, and cannot easily or necessarily be resolved by the initial design of the op amp.
One approach to compensate for voltage drift is to employ a chopper-stabilizer circuit. The chopper-stabilizer circuit dynamically nulls the offset of a primary op amp. There are a variety of ways to implement a chopper-stabilized operational amplifier. See, e.g., Jones and Webb, "Chopper-Stabilized Op Amp Combines MOS and Bipolar Elements on One Chip," Electronics, Sep. 27, 1973, pp. 209-13.
FIG. 1 shows a conventional chopper-stabilized operational amplifier 1, with an auxiliary chopper-stabilizer circuit 17. Primary op amp 10 is typically a high-frequency, wideband amplifier. As shown, op amp 10 has a negative feedback path 16 between its output 18 and its inverting ("-") input terminal. Op amp 10 is also provided with a trim port 11, so that its offset may be nulled. Chopper-stabilizer circuit 17 is connected between nodes A, B and trim port 11. The offset voltage of op amp 10 is depicted as being a small dc voltage V.sub.OS, between the noninverting terminal ("+") and inverting terminal ("-") of op amp 10.
In FIG. 1, the noninverting and inverting terminals of op amp 10 are electrically connected to chopper-stabilizer circuit 17 via nodes A and B, respectively. At nodes A and B, V.sub.os is converted to a periodic square wave by the switching action of switch 12 between nodes A and B. The square wave passes through coupling capacitor C1, and is input to amplifier 13, which amplifies the AC signal. The amplified AC signal then passes through coupling capacitor C2. An amplified DC voltage is recovered by the switching action of switch 14 across resistor R1 at nodes D and E, and by a low pass filter comprised of resistor R2 and capacitor C3. The DC voltage is then input via line 19 into trim port 11 of op amp 10 so that the offset voltage of op amp 10 is nulled.
Switches 12 and 14 are synchronized to switch repeatedly between a first state or position (e.g., nodes A and D), and a second state or position, (e.g., nodes B and E), and vice versa, with an interval of time between each of the switchings that is determined by clock 15. Clock 15 outputs a clock signal which, directly or indirectly, indicates the time at which switches 12 and 14 are to switch from their first state to their second state, or vice versa. Clock 15 may be an oscillator, for example, and the clock signal may be, or be formed from, the oscillating output voltage states of such an oscillator.
Typically, the amount of time between the switchings of the chopper switches is constant. That is, the switching frequency is constant. The switching frequency is typically a frequency far in excess of the frequency of the external signal applied to the input(s) of primary op amp 10. This approach reduces interference due to noise generated by the switches at the switching frequency. This approach is not optimal, however, because of "aliasing," which occurs when harmonics of the switching noise interfere with the desired signal.
U.S. Pat. No. 5,115,202 describes a "spreadspectrum" approach to reducing noise in a chopper-stabilized op amp. The approach uses a pseudo-random bit sequence ("PRBS") generator to pseudo-randomize the frequency of the chopper switches. In single-chip integrated circuit applications, however, this approach is not optimal. The PRBS generator creates digital noise on power supplies, which may interfere with the signal being amplified by the primary op amp as well as affecting other circuits on the chip. Moreover, the PRBS generator is only pseudo-random, not truly random like the present invention. A PRBS generator has a limited capacity for outputting random numbers and will repeat its output once that capacity is exhausted. A spectrum analysis of the output signal of a PRBS generator will yield some periodic signal. Thus, it is not truly random. Finally, the degree of randomness attained using the PRBS generator is not easily modifiable.
Accordingly, a need exists in integrated circuit applications for a clock with a true random, yet controllable, oscillation period. Use of such a true random clock in, for example, a chopper-stabilized op amp to control and randomize the amount of time between each switching of the chopper switches, would reduce the problem of interference due to aliasing of the noise created by the switching of the chopper switches. It would reduce such interference because the frequency of the switching would be random, not periodic, minimizing the generation of harmonics. Ideally, such a clock would not, in and of itself, create significant, if any, digital noise on power supplies.